FPGAs are phenomenally powerful tools for building high-bandwidth, low-latency experimental control hardware. They are ``reconfigurable hardware,'' meaning that a program defines the connectivity of a high-speed circuit. The good news is that these devices can be used for everything from ultrafast, flexible feedback controllers to direct digital synthesis and quantum control; the bad news is that the hardware description languages that are used to configure these devices has a steep learning curve.
In the Simon Lab, we are harnessing these tools to build quantum materials and photonic quantum interfaces. We've put in the legwork to develop/build what we think are some pretty phenomenal devices and realized that many of them would be of interest to the community-- so we are sharing them! We ask only that you send us a nice thank-you, and refrain from selling or distributing extensions to our tools. Please report bugs to us by email . We usually follow up pretty quickly!
As detailed in our recent paper, we have demonstrated a fantastically flexible digital FIR filter capable of cancelling numerous high-Q mechanical resonances, with a built-in network analyzer for characterizing its performance. This [[zipped archive]] contains a detailed README.txt file and the .bit file for configuring the FPGA to act as the FIR filter/VNA, as well as:
(1) a shell script to configure the RP;
(2) python scripts to send an FIR filter to the FPGA and measure the system/filter response functions;
(3) Mathematica scripts to generate FIR filters and plot the measured response functions.
The .bit file in the archive below employs a single 125MSPS DAC channel in the Red Pitaya to simultaneously output up to 10 programmable, real-time sweepable frequencies, with programmable, sweepable amplitudes. This device is ideal for interfacing with an AOD for optical-tweezer experiments. This device is also externally triggerable, with a max output frequency of 62.5MHz. To provide an external clock reference see this link , and the included README.txt. [[zipped archive]]
The .bit file in the archive below harnesses the two-channel 125MSPS DAC in the Red Pitaya to create a two-channel frequency synthesizer whose output frequencies may be programmably swept, using a ``script'' sent from a computer, and externally digitally triggered with few ns resolution. The maximum output frequency for each channel is fclk/2=62.5MHz. To provide an external clock reference see this link , and the included README.txt. [[zipped archive]]
The .bit file in the archive below harnesses 8 digital outputs in the Red Pitaya to create an eight-channel arbitrary digital pulse sequencer that can be programmed using a ``script'' sent from a computer, and externally digitally triggered with few ns resolution. To provide an external clock reference see this link , and the included README.txt. [[zipped archive]]
To use these tools, start by purchasing a RedPitaya (RP) board (model STEMLab 125-14) from RedPitaya.com or Digikey, and installing a standard RedPitaya OS build on your RP from this site . From there, unzip the file associated with the above tool of your choice into its own directory. Further instructions are contained in the README.txt in that directory.
Should you wish to lock your device's clock to a referenced 125MHz source, please take a look at this link .
Further instructions specific to the particular package of interest are provided in the README file in the (now decompressed) archive.
For further help getting initial communications with your RP working, take a look at this page .
To build on our tools, you will need the Verilog source code instead of the (synthesized and implemented) .bit file. In this case, please contact Jon directly.